The Intel Software Development Emulator is a functional emulator for new and upcoming instruction set extensions. The emulator is based on the Pin dynamic binary instrumentation system (and XED). It emulates the new instructions in the SSE4, AES, PCLMULQDQ, and RTM, BMI1, and BMI2 Intel AVX, AVX2, and AVX512 instruction set extensions. This allows developers to gain familiarity with Intel's upcoming instruction set extensions.
|Tags||Software Development Testing Emulators|
|Operating Systems||Windows Windows Linux Mac OS X|
Release Notes: This release fixes Quark handling of the PAUSE instruction.
Release Notes: Adds support for XSAVEC and CLFLUSHOPT. Disables TSX CPUID bits when TSX emulation is not requested. Improves disassembly for MPX instructions. Adds an option for running chip-check only on the main executable. Adds support for -quark (Pentium ISA). Adds application debugging for Mac OS X with the lldb debugger.
Release Notes: This release adds support for Mac OS X version 10.9. Improved TSX statistics information. Various fixes with the emulation of floating-point instructions of the Intel AVX-512. The alignment checker tool is enabled by default for instructions that require alignment. A mismatch between mix and dynamic mask profiler has been fixed. The Intel MPX runtime libraries for Windows have been updated. Performance improvements when modeling a CPU prior to AVX-512.
Release Notes: Debugging with GDB is now supported with Intel AVX-512. Emulation of Intel AVX2 FMA and Intel AVX-512 FMA uses native FMA instructions when running on Haswell hosts. Various fixes with the emulation of floating-point and conversion instructions of Intel AVX-512. Disassembly of control transfer instructions displays the 'bnd' prefix when used with Intel MPX. The XED ISA set names for Intel AVX-512 have been updated.
Release Notes: This release adds emulation support for the Intel Advanced Vector Extensions 512 (Intel AVX-512) instructions, Intel Secure Hash Algorithm (Intel SHA) extensions, and Intel Memory Protection Extensions (Intel MPX), support for Hardware Lock Elision, improved support for Restricted Transactional Memory, and improved support for the OS X operating system (Mountain Lion).